1. Field of the Invention
The present invention relates generally to add-compare-select circuits, and more specifically to fast bit-parallel add-compare-select circuits for Viterbi decoders.
2. Background of the Related Art
Viterbi decoders are used in a wide range of communications and data storage applications, and are known to be the performance-limiting units in wireless DSP cores. The add-compare-select (ACS) circuit of the Viterbi decoder generally sets the performance of the unit. Thus, the overall speed of a Viterbi decoder is largely determined by the ACS computation time.